This invention relates to a digital data processing circuit and processing method, and more particularly to an encoding/decoding circuit and method utilizing ADPCM (adaptive difference pulse code modulation) or the like.
Recently, there is a method of temporarily storing read-out data through a filtering operation and compression and thereafter expanding the compressed data in order to ensure shock-proof during data reading using a CD player or the like. In such a technique, data trains are subjected to decoding and encoding through an ADPCM technique, using a digital data processing circuit, for example, shown in FIG. 5.
An encoding circuit 51 comprises adders A1, A2 and A3, registers C1 and C2, multipliers M1 and M2, and quantizer QN so that the latest input data is subjected to a filtering operation with a coefficient value of 1 multiplied by the latest input data and thereafter quantization. The inputted data Xi is subjected by the adder A1 to addition with a quantization noise Qri caused by the quantizer QN, and 1-sample data delay by the register C1. The data delayed by the register C1 is further delayed by 1-sample data by the register C2. Data outputted from the registers C1, C2 are multiplied by respective filter coefficients f1, f2 by the multipliers M1, M2, and these delay components are added to the data Xi by the adder A2, thus performing a FIR filtering operation. That is, the filtering operation with coefficient 1 by which the latest data is multiplied is realized by directly inputting the latest data to the adder A2 where it is added by delay components respectively multiplied by filter coefficients f1, f2, without multiplication by a particular coefficient. The adder A2 has output data quantized by the quantizer QN. For example, outputted data is one that is encoded through truncating an appropriate number of least significant bits. Meanwhile, the adder A3 subtracts the output data of adder A2 from the encoded data, thereby generating a quantization noise Qri.
A decoding circuit 52 is formed by an adder A4, registers C3, C4, and multipliers M3 and M4, to perform IIR filtering operation on the encoded data thereby providing decoded data. This is effected by the following operations. The output data of the adder A4 is delayed by 1-data sample by the register C3, and further delayed by 1-sample data by the register C4. The data outputs of the registers C3 and C4 are respectively multiplied by coefficients -f1, -f2, rendered negative of the filter coefficients f1, f2, by the multipliers M3, M4, and then added as recursive components to the encoded data.
In the above structure, however, the encoding circuit 51 and the decoding circuit 52 involve truncation noises for performing multiplication on data by the coefficients (f1, f2 or -f1, -f2). The filter coefficient has a decimal component, and accordingly the result of multiplication naturally contains a component smaller than a least significant bit represented on a data bus. Due to truncating such a component, a noise occurs. Assuming that the data Xi is configured by 16 bits having 1 code bit and 15 data bits, a calculation process is effected in 24 bits by adding with 6 decimal bits and 2 sign bits. Meanwhile, it is assumed that the coefficients f1, f2 are values represented by 6 decimal bits. To represent a value of 24-bit data multiplied by the coefficient f1, f2 requires 30 bits. However, since the processing is effected by 24 bits, truncation is made on least significant 6 bits of the decimal bits. In FIG. 5, the respective truncation noises caused by the multipliers in the encoding circuit and the decoding circuit are represented by Qmi and Qdi.
That is, in a encoding/decoding apparatus with ADPCM or the like, the most prominent noise component responsible for degradation in sound quality is round-off noise (quantization noise) Qri caused by the quantizer in FIG. 5. Besides this round-off noise, there exists truncation noise caused by the multiplier used for the above-stated filtering operation. In particular, where input data is small and the encode circuit has a small filtering operation output, the truncation noise is a principal factor of worsening sound quality.
Incidentally, although truncation noise as stated above can be decreased by increasing the number of bits for arithmetic operation, such measure results in increase of circuit scale.